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> POSIX even changed their rules about binary in shell scripts specifically to let us do it.

What does this refer to?

The latest POSIX standard was released 2007. [1]

1: https://standards.ieee.org/ieee/1003.1/7101/


Author here. See https://austingroupbugs.net/view.php?id=1250 and https://austingroupbugs.net/view.php?id=1226 with a major shoutout to Jilles Tjoelker from the FreeBSD who helped make it possible back then!


POSIX / SUS / the Open Group Base Specifications have issues (pun not intended, but I’ll take it), and then those issues have editions. The last one of those is from 2018[1], being a revision of (indeed) the 2008 issue. (I remember Landley being more than a little acidic about this versioning scheme.)

I still have no idea what the quote is referring to, though, and given Justine’s slightly (deliberately?) unhinged manner of writing, I’d give even odds the change is in fact from 2001 or something like that.

[1] https://pubs.opengroup.org/onlinepubs/9699919799.2018edition...


The references to POSIX "approval"/"changes" in Cosmopolitan docs are usually talking about bugs like this: https://austingroupbugs.net/view.php?id=1250

I'm not sure whether the proposed changes have actually made it into a published edition of the specification.


This looks to be the one, thank you! Doesn’t look to have gotten into the current version [the sh(1) page in the version I linked still refers to text files]. (The bug is also tagged tc3-2008, when the last corrigendum released is TC2, and the change was marked applied in 2019. So it makes sense it hasn’t found its way into a release yet.)


Don't think this is the bug they refer to, but it's one affecting sh input rules. There are others.

https://austingroupbugs.net/view.php?id=1250


How does this differ from Structured ASICs?


Structured ASIC are generally fixed size monolithic chips with metal/via programmablity to control some amount of wiring (hardcopy, easic,..). Modern FPGAs with a mix of har coded blocks (serde, cpus, DSP) connected by NoCs and PL is another example. The front end transistor layers are fixed.

The Zero ASIC platform does "late binding" by wiring together different chiplets (cpu, lm, fpga, serdes,...) in the package. Both approaches are addressing the same problem of flexibility vs performance, but the approaches are very different.


The gerber files and software is open source. Just order you own from your preferred pcb fab.


Probably because noone wants to user rizin when you can use radare2. :-)


I'm still fuzzy on the difference between the two, would you mind to elaborate?


There are many different technical differences that accumulated over time - we save projects as a state snapshot, not a sequence of commands[1], we save types as semantically connected structures in a database that is guaranteed to be consistent[2], use better stack tracking for arguments and variables[3], not SP/BP/whatever, slowly migrate to a new generation of IL - RzIL instead of ESIL[4], provide standard libraries signatures out of the box in the FLIRT format[5], switched to a new way of parsing and processing commands[6], provide basefind, and many other small differences.

[1] https://rizin.re/posts/introducing-projects/

[2] https://github.com/rizinorg/rizin/tree/dev/librz/type

[3] https://github.com/rizinorg/rizin/releases/tag/v0.5.0

[4] https://github.com/rizinorg/rizin/blob/dev/doc/rzil.md

[5] https://github.com/rizinorg/sigdb

[6] https://rizin.re/posts/rzshell/


What about x64dbg? Is that considered the standard on Windows?


I've had an ebay watchlist for the Comdyna GP-6 for a few years now. Seems like Im not the only one in this hole. :-)


Get a VM running NetBSD or OpenBSD and check out the source code and play with it!


I also do this, works great.


It's just a reference, I wouldn't view it as teaching material.

Its quite useful to look things up in.


Yep, this is an extended survey of interrelated concepts organized according to increasing complexity.

Similar to textbooks in the organizational principle, but differentiated in substance in that it assumes familiarity with the underlying topics and focuses on the relationships between the concepts rather than the concepts themselves. Good for practitioners I think.


Last year I was contacted by a woman whose late husband had amassed a collection similar to yours.

She had decided to donate the machines to those who would find a use for them, that being old co-workers and student organizations at nearby universities, the latter including me. Who would keep them running and in use instead of just collecting dust.

We actually have a guy who still uses an Amiga at his current job spitting out code and whatnot which is quite cool. :-)


This article seems to miss some really important points regarding the layoffs. A majority of the employees that were laid off were recent hires which is evident from the publicly available "Klarna Affected Employees Input Form" available here [1]. It appears that Klarna went on a hiring frenzy and had to reverse that decision. Out of the 560 responses almost 100 are labeled "Talent Acquisition"/"Recruitment".

[1] https://docs.google.com/spreadsheets/d/e/2PACX-1vSsm-8CVBoTJ...


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